Sital Extends the MultiComBox Tester with EBR 1553 Capabilities

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Sital Extends the MultiComBox Tester with EBR 1553 Capabilities

Posted on by Sital_web3D

EBR-1553 operates at a 10Mbps bit rate and employs the resilient Mil-Std-1553 protocol through RS-485 transceivers in a point-to-point connection hub. Employing a star-based network topology between Remote and BC Terminals facilitates resilient and rapid data transfer.
EBR-1553’s communication speed is significantly faster than traditional MIL-STD-1553’s 1Mbps. This high-speed capability is crucial for applications requiring rapid data transfer and real-time processing. The adoption of RS-485 transceivers in a point-to-point hub enhances the reliability and speed of data exchanges between terminals, supporting the demands of advanced avionics and military communication systems.

The implementation of a star-based network topology in EBR-1553 systems facilitates more efficient and resilient data transfers. Unlike the bus-based structure of standard MIL-STD-1553, this topology allows for direct, isolated connections between the bus controller (BC) and each remote terminal (RT), minimizing the potential for data collision and ensuring a higher degree of network stability in critical communication environments.

EBR supports various modes of operation – “SPEC” mode, “SWITCH” mode and “LINK” mode.

SPEC mode is similar to the standard 1553 protocol, where the BC sends the message in all ports, all RTs receive the message, and only the RT with the appropriate RT address should respond.

In SWITCH mode the BC sends the message only on the port where the particular RT is connected. For example, if a message is intended for RT 6, then it will be transmitted only on port 6, and the message will contain the RT address 6.

In LINK mode, the message is transmitted only on the appropriate port which corresponds to the required RT address (for example – port 6), but the RT actual address on the message command is ‘0’ for all RTs. This means that any RT that receives a message in this mode, with the RT address ‘0’ should answer to the message. Therefore, RTs are physically connected to the corresponding ports on the BC.

In MultiComBox Sital supports all three modes of operation, offering unprecedented flexibility in communication strategies. These modes allow system architects to tailor data transmission approaches to specific operational requirements, whether it’s broad message broadcasting in SPEC mode, targeted communication in SWITCH mode, or uniform addressing in LINK mode, enhancing the system’s adaptability to various mission scenarios.

By supporting all three operational modes of EBR-1553, the MultiComBox tester becomes an invaluable tool for developers and engineers working on a wide range of communication systems. This versatility ensures that the tester can adapt to varying project requirements, from simple setups to complex configurations, providing a solid foundation for the development, testing, and implementation of advanced communication protocols within the aerospace and defense sectors.

The extension of the MultiComBox tester to include EBR-1553 capabilities represents a significant advancement in testing and validation tools for communication systems. This enhancement allows for comprehensive testing across all operational modes of EBR-1553, ensuring that systems are rigorously evaluated for performance, reliability, and compliance with the enhanced bit rate standard, thereby supporting the development of more robust and efficient avionics systems.

For more information please visit: https://sitaltech.com/products-main-page/multicombox/

Sital Integrates Wiring Fault Detection Capabilities Into it’s BRM1553 MIL-STD-1553 IP Cores

Posted on by Sital_web3D

Sital Technology Ltd. announced today that its patented technology for detecting wiring faults will be integrated into its BRM1553D, BRM1553FE and BRM1553PCI Mil-Std-1553 IP cores and boards.

Sital’s Passive TDR (pTDR™) technology is capable of detecting wiring problems such as disconnections, short-circuits, and others, whether they are constant or intermittent. pTDR is a Passive Time Domain Reflectometer (TDR) technology, which constantly measures reflections of energy on an operating Mil-Std-1553, CAN or similar bus. pTDR technology runs during normal system operation without disturbing the standard bus activity.

A standard TDR device sends pulses of energy to the bus and measures the reflected signal. Reflections are created from wiring faults such as disconnections, shorts or lack of proper termination. The time it takes for the signal to travel to the fault and back to the TDR is related to the location of the fault. However, a TDR cannot run while the system is operating, simply because it would be confused by the on-going transmissions on the bus, and also because it may disturb the standard communication.

pTDR does not transmit any pulses to the bus. Instead, it monitors the existing communications and measures reflections created by the normal transmissions. If there are wiring faults then signals will be distorted in certain ways that are related to the location of the fault. The main distortion is related to the width of transmitted bits. For example, in Mil-Std-1553 bits width is 1uS. A distorted bit can last for an additional few nano-seconds, according to the location of the fault. pTDR measures the distortions and reports the additional length of each bit. We call this additional length a “tail”.

The Sital pTDR system constantly reports tails from all Remote Terminals (RTs) on the network. In a correctly performing bus the tails from all RTs will be small and uniform. Changes in the tails indicate a bus fault.

Tail measurements are constantly performed on every message and updated on every frame. Therefore, even a very short disconnection event will be reported.

“The current situation is that each system on the aircraft performs its own built-in-test (BIT) and reports its own problems. But there is no mechanism for performing BIT to the bus wires or reporting wiring problems when they occur.” said Ofer Hofman, Sital’s CTO. “Our technology adds a great level of reliability to the bus, without interfering with the bus activity and without adding any complexity to the system.” He added.

Duli Yariv, Sital’s VP Marketing and Sales said: “Our pTDR™ technology is already implemented on CAN bus and used by automotive manufacturers for detecting wiring faults on vehicles during manufacturing, maintenance and operation. We are excited to enable our avionics and automotive customers to enjoy this technology, add value to their products and make safer aircraft and vehicles.”

pTDR technology for detecting wire faults will be available on the full range of Sital products: testers, IP cores and interface boards.

For more information please visit: https://sitaltech.com/technology/smart-wiring-fault-detection-technology/

Sital Extends it’s BRM1553 IP with Error Injection Testing Capabilities

Posted on by Sital_web3D

Until now, BRM1553 IP cores delivered to customers were mainly targeted for in-flight applications. This means that no errors are allowed to be generated from the system.

However, a recent customer application required Mil-Std-1553 testing capabilities from an already-existing flight system, so that the same system can be used as a bus simulator on the ground or as an in-flight operational system.

Multi-RT feature is an essential feature for a Mil-Std-1553 bus simulator. It means that a single 1553 node can be programmed to act as many 1553 Remote Terminals. The user can program the Remote Terminal (RT) addresses which are simulated and thus the unit will answer and create messages, as requested by a Bus Controller (BC) for the simulated RTs.

The Error Injection feature enables the system to simulate several types of errors which may occur on a 1553 network. Therefore, errors like Parity Error, Sync. Error, Zero-Crossing Error and others are all part of an advanced 1553 test and simulation system.

Same Hardware for Interface Card and Test Benches.

Many avionics vendors, who develop avionic systems, are required to provide test benches for their systems. In many cases, developing the test bench is a high cost project, requiring development of boards, software and other simulation tools, usually at low volumes. Therefore the advantages of developing a single hardware that can be used both as a flight system and as a bus simulation tool are obvious. First – there is only need to develop a single hardware, and not require equipment from additional vendors for bus simulation and testing. Second – customers can re-use the software written originally for the actual system also for testing, ensuring lower development cost and enabling faster time to market.

Of-course, the customer needs to make sure that the test software is not loaded into the operational systems. This can be achieved by having a separate FPGA load file for each system and also by enabling or disabling the Multi-RT and Error Injection features by hardware. This means that the IP core can enable or disable the features, by reading hardware configuration bits, which are set differently between the tester and the in-flight system.

Both features can be added to Sital’s standard BRM1553D, BRM1553PCI and BRM1553FE Mil-Std-1553 IP core and are provided with software API, so that users can easily implement these test features into an existing Mil-Std-1553 system.

Sital Announces the Release of the BRD1553 PC104 PC104 Multi Interface Board

Posted on by Sital_web3D

Sital Technology announces the launch of its new PC104+ board, an efficient and robust platform for avionics communication bus applications.

The BRD1553PC104 Board is a PC-104+ Card, a versatile multi-standard board featuring two dual-redundant Mil-Std-1553 channels. It offers compatibility with Mil-Std-1760 and Mil-Std-1553B, allowing independent configuration of its channels for collaboration with WB-194, EBR1553, and H009 in tandem with 1553. Additionally, upon request, support for other protocols like French DigiBus is also provided.

Its ability to support a range of protocols makes it highly versatile in diverse avionics systems, ensuring seamless communication across different platforms.

Further enhancing its versatility is the BRD1553PC104 Board, which leverages FPGA technology for optimal performance. The use of this FPGA-based architecture supports the implementation of complex communication protocols on a single compact board. It allows for rapid reconfiguration of the board to support different avionics communication standards and custom functionalities.

This blend of features makes it ideal for applications requiring multi-standard compatibility and high reliability.

Built upon Sital’s established H009, 1553, and WB-194 (WMUX) IP cores, the PC-104+ Board utilizes an FPGA (Field Programmable Gate Array) component along with individual transceiver components. Sital provides programming capabilities for the board, offering the flexibility to accommodate different sets of protocols and configurations using identical hardware. It includes 8 Generic I/O pins, that could be utilized as RS-485/RS-422, and also includes ARINC-429 (8 transmit channels and 16 receive channels) or eight avionics I/O. Moreover, it incorporates 8 digital I/Os and includes input and output channels for IRIG-B time tagging.

These extensive input/output capabilities enable the integration of a wide range of avionics devices and sensors. It also supports complex applications that require multiple data transfer and communication interfaces.

The inclusion of two dual-redundant Mil-Std-1553 channels makes it possible to configure each channel independently. In turn, this enhances the system’s fault tolerance by ensuring continuous operation even in the event of a channel failure. This capability is crucial for mission-critical military and aerospace applications where communication integrity is paramount.

The board’s support for IRIG-B time tagging is a critical feature for applications requiring precise timing and synchronization, such as data acquisition and telemetry systems. The ability to tag data with accurate timestamps enhances data integrity and allows for the precise correlation of events in complex avionics systems, improving system analysis and troubleshooting capabilities.

The BRD1553PC104 Board’s advanced programming flexibility facilitated by its FPGA-based design supports advanced programming flexibility. This flexibility allows developers to customize and update the board’s firmware to meet specific application needs, including the implementation of custom protocols or the integration of additional functionality.

Such programmability is invaluable in rapidly evolving avionics environments, enabling users to adapt to new standards or requirements. It eliminates the need for frequent hardware replacements, thus ensuring a future-proof solution for a wide array of avionics communication tasks.

The board’s architecture is designed to optimize data handling, offering efficient processing and routing of avionics data. This enhances system performance by ensuring smooth and reliable data flow between various avionics systems and components, crucial for operational efficiency and safety.

For more information please visit: https://sitaltech.com/products-main-page/pc104-cards/

Sital Announces the Availability of 10 Mbit MIL-STD-1553 IP Cores

Posted on by Sital_web3D

Eight integrated circuits on a circuit board

Sital Technology announced today that it completed the design of the Enhanced Bit Rate (EBR) 1553 Intellectual Property core for FPGA.

The EBR-1553 protocol operates at a bit rate of 10Mbps, employing the resilient Mil-Std-1553 protocol through RS-485 transceivers in a point-to-point connection with a hub-based configuration. Robust and high-speed data transfer is facilitated by utilizing a star network topology between Bus Controllers (BC) and Remote Terminals.Sital’s EBR-1553 IP core is developed based on the established BRM1553D 1553 IP cores from Sital, featuring a DDC® Enhanced Mini-Ace® compatible interface. Available configurations include Remote Terminals, Bus Controllers, and Bus Monitor IP Cores. The BRM1553D core is compatible with any FPGA and only requires a standard RS-485 transceiver supporting a 10Mbps data transfer rate.

The use of the MIL-STD-1553 protocol and RS-485 transceivers offers top-notch error detection and correction capabilities. This ensures data integrity even in the most challenging environments.

Furthermore, the IP core’s compatibility with any FPGA and its flexibility in configuration allow for easy integration into existing systems, reducing development time and costs. The provision of software drivers and high-level API compatibility with DDC API facilitates a smooth transition for developers accustomed to traditional 1553 systems.

Users of Sital’s EBR-1553 IP core can select the core configuration (BC, RT, MT), clock frequency, memory configuration, and FPGA family. The back-end interface can be targeted to a local bus, PCI bus, or simple FIFO/registers read/write bus.

The IP Core is provided with software drivers for Windows, Linux, and QNX along with high-level API. The API is fully compatible with DDC API so that software developers already used to the DDC interface can easily transfer their existing applications to EBR.

An EBR-1553 tester is also available, utilizing the exact same hardware as the commonly used MultiComBox™, only with updated firmware.

The EBR-1553 IP core finds its application in various critical fields requiring high-speed and reliable data communication, such as aerospace, defense, and avionics systems. The ability to support a high bit rate of 10Mbps makes it ideal for modern, sophisticated applications, including mission-critical systems, where rapid data transfer and processing are paramount.

This enhanced bit rate significantly improves system performance and responsiveness in real-time operations. It also makes the IP core suitable for a wide range of communication protocols.

“We are very pleased that we can now deliver high-speed EBR-1553 IP to our customers”, said Duli Yariv, Sital’s VP of Sales and Marketing. “Customers will enjoy the robustness of the 1553 protocol at a high speed of 10Mbps over the very low-cost RS-485 transceivers, with the ability to easily integrate the core into their FPGA and application” he added.

Ofer Hofman, Sital’s CTO pointed out that “unlike other vendors’ solutions, Sital’s is a complete solution that includes all modes of operation – BC, RT and Monitor – along with software drivers and EBR tester hardware”.

The EBR-1553 IP core joins the Sital’s growing family of Mil-Std-1553, Arinc429, CAN, WB-194, and other reliable serial bus communication IP cores and solutions. For more information please contact us at: https://sitaltech.com/products-main-page/ebr-ip-core/

Sital Announces the Release of MINUET – the World’s Smallest MIL-STD-1553 Component

Posted on by Sital_web3D

Hand with a blue glove holding a green microchip

Sital Technology, recognized as the global frontrunner in Mil-Std-1553 IP cores and products, declares the release of Minuet™, the tiniest Mil-Std-1553 bus controller component in the world. Minuet™ represents a series of independent, condensed Mil-Std-1553B protocol terminals, encompassing the roles of Remote Terminal (RT), Bus Controller (BC), and Monitor (MT). Its adaptable configurations allow Minuet™ to function as BC/RT+MT or RT+MT, depending on the setup. Minuet™ is offered with high-density packaging options, presenting itself in an 8mm square Chip Scale Ball Grid Array (csBGA) or a 17mm square configuration with a 1mm pitch ftBGA packaging.

Minuet™ devices share software compatibility with DDC® Enhanced MiniACE® components and architecture, boasting an internal memory capacity of either 8K or 16K Words.

A Minuet™ device is able to work in conjunction with any standard 1553 transceiver and transformer, or with Sital’s discrete transceiver. When used in conjunction with NHI’s Bus+™, a complete 1553 solution includes an 8mm Minuet™ component and 2 x Bus+™ components, making this the smallest available complete solution for 1553.

Each device can be configured for Local Bus or PCI interface, supporting PCI burst mode for very fast data transfer to and from the device. The flexible nature of the Operating Clock frequency allows users to choose from a broad spectrum of frequencies by making entries into a device register. This eradicates prolonged bus cycles and the existence of numerous clock domains on the board, streamlining timing demands and mitigating issues related to EMI and RFI.

Additionally, this flexibility and the ability to choose between multiple interfaces make it an adaptable solution for various communication needs.

The versatility of Minuet™ extends to a wide array of applications, from aerospace and defense to industrial automation. Its small footprint and high-density packaging options allow it to be integrated into systems where space is at a premium, such as in UAVs, handheld devices, and compact sensor systems.

Moreover, the Minuet™ component’s software compatibility with DDC® Enhanced MiniACE® ensures seamless integration into existing systems, facilitating upgrades without extensive modifications. This compatibility significantly reduces development time and costs, providing a straightforward path for integrating advanced 1553 functionalities.

The dual memory capacity options offer further customization, enabling developers to select the optimal storage size for their application, whether it involves simple data logging or more complex data processing tasks.

Minuet™ is available in several configurations:

  • BC/RT/MT or RT/MT with local bus interface.
  • BC/RT/MT or RT/MT with PCI interface.
  • 8K (csBGA, 8 x 8 mm package) or 16K (ftBGA, 17 x 17 mm package) Words of internal memory

“We are delighted to release this device now” said Ofer Hofman, Sital’s founder and CTO, “with Minuet™ we are able to provide the smallest and the lowest cost solution for 1553, which is compatible with DDC® legacy interface” he added.

Duli Yariv, Sital’s VP of Sales and Marketing said: “Our customers can now choose between a wide variety of components and IP core implementations to meet their performance and cost criteria. Minuet™ is the bridge between the proven legacy software developed in the past and the form-factor and flexibility that is required for the future.”

More information can be found at Sital Technology website – http://www.sitaltech.com.

Sital Announces the Release of the OCTAVA MIL-STD-1553 Component

Posted on by Sital_web3D

Sital Technology, the leader in IP cores and products compliant with Mil-Std-1553, announced today the release of OCTAVA™, a Mil-Std-1553 communication engine, compatible with DDC® Enhanced MiniACE® devices.

The OCTAVA™ family integrates the BRM1553D Mil-Std-1553 a protocol processing unit, a pair of 5-volt transceivers, memory administration, processor connectivity logic, and either 4K or 64K words of RAM, all encased in a 72-pin Plastic Quad Flat Pack (PQFP) package. The family consists of two-way data buffers and built-in address latches, facilitating a direct interface with the host processor bus. The memory management scheme for RT mode provides three data structures for buffering incoming and outgoing data. Combined with the extensive interrupt capability, these structures serve to guarantee data consistency whilst off-loading the host processor.

These memory management features offer flexible data structure management, essential for optimizing the handling of incoming and outgoing messages. This flexibility allows for efficient organization and access to data, which is particularly beneficial in systems that require rapid processing and retrieval of communication messages. Such a design not only enhances system performance but also contributes to a reduction in processor load, allowing for smoother operation and better resource allocation.

By incorporating advanced data integrity mechanisms, OCTAVA™ leverages the robustness of the MIL-STD-1553 protocol to ensure secure and reliable data transmission. These mechanisms are critical in environments where data accuracy is paramount, such as in aerospace and defense applications.

The integration of error detection and correction algorithms directly into the communication engine minimizes the risk of data corruption. It ensures that transmitted information remains intact and reliable across complex systems.

The OCTAVA devices can also boot-up as RT with the busy bit set for 1760 applications. The BC mode incorporates numerous functionalities designed to offer an effective real-time software interface to the host processor. These include versatile interrupt creation, automatic repetition of frames, customizable inter-message gap durations or message rates, and automated retry mechanisms.

The OCTAVA™ devices are pin-to-pin compatible with the DDC® BU-65178 and BU-61688 and as such serve as a perfect drop-in electrical, physical and software replacement. The pin-to-pin compatibility facilitates seamless integration into existing avionics boards. An avionics board designed with the DDC® BU-65178 and BU-61688 can work seamlessly with the OCT-65178 and OCT-61688 without hardware or software changes.

This compatibility feature is a significant advantage for systems engineers and designers, enabling an easy upgrade path to incorporate the latest MIL-STD-1553 communication capabilities. It simplifies the migration process, ensuring that system updates can be implemented swiftly and with minimal disruption to ongoing operations.

“The OCTAVA™ family completely changes the Mil-Std-1553 market. A market that was previously dominated by a single vendor will now benefit from the power of competition”, said Duli Yariv, VP of marketing for Sital Technology. “OCTAVA™ does not only offer price benefits over the competition, but it also introduces many technology and functional advantages for customers” he added.

OCTAVA™ was introduced in partnership with National Hybrid Inc. (NHi), who designed the transceiver and manufactures the device in the USA.

PCI-to-MIL-STD-1553 IP Core

Posted on by Sital_web3D

The newly released PCI IP core was developed in order to overcome problems related to existing BRM1553D,BRM1553FE and BRM1553PCI IP cores, specifically in the aerospace industry, where high reliability, wide temperature range and easy integration are key.

Ofer Hofman, CTO of Sital said: “While working on a project with a PCI core from one of the FPGA vendors, we discovered that the core we used doesn’t work in high temperature, even though the temperature was within the range of the component. We concluded that this is due to timing problems created by the core.

Another FPGA vendor provided us with a core that was very hard to integrate. We therefore used our extensive now-how and developed our own core, which is now successfully used in several projects”.

The core can be used for any FPGA and is provided in VHDL source code.

Sital’s BRM1553 MIL-STD-1553 IP enables obsolete IC replacement at a major OEM integration lab

Posted on by Sital_web3D

Kfar Saba, Israel – November 24, 2005 – Sital Technology, a leading provider of military standard Intellectual Property (IP) cores, announced today that a large Israel based company, will be using the company’s MIL-STD-1553B IP Core for their MIL-STD-1760 weapons bus.

Sital’s BRM1553 core is a second source replacement for a leading Integrated circuit (IC) provider of MIL-STD-1553B devices. Sital has committed to deliver an Altera StratixII FPGA core, which will use the very same Software (SW) drivers, developed for the replaced IC.

The customer developed a PCB board that can accommodate both the 1553 IC AND the required transceivers for the IP core. When the Software integration is completed with the IC device the core will use the same SW drivers and deliver the very same capabilities delivered by the IC device.

Featuring the smallest gate count in the industry, Sital’s MIL-STD-1553B IP core offers highly improved reliability robustness, flexibility and ease-of-use. It is also one of the few IP cores on the market that passed the RT Validation tests, a set of complex qualification tests required to connect to the front-end and ensure complete reliability.

“Sital’s IP core direct replacement for DDC devices poses a very challenging goal for Sital R&D department, and we are looking forward to finalize the Hardware Software integration as soon as possible” said Ofer Hofman, founder and R&D Manager of Sital Technology.

“The customer is able to benefit from improved reliability, robustness and ease of use, with the ability to save more than 50% of its MIL-STD-1553 solutions. We are expecting the bigger customers of 1553 solutions in Israel to save more than 1 million dollar each per year when they fully migrate to our IP solutions”, said Duli Yariv, VP marketing of Sital Technology.

Sital’s IP cores are available for Remote Terminal and Bus Monitor applications. An IP core for Bus Controller applications will be available in Q1 2006. Sital’s business model enables the company to customize pricing models per the customer’s specific needs.

NASA selects Sital’s BRM1553D IP for MIL-STD-1553 Space Equipment Communication

Posted on by Sital_web3D

Kfar Saba, Israel – November 16, 2005 – Sital Technology, a leading provider of military standard Intellectual Property (IP) cores, announced today that NASA, the National Aeronautics and Space Administration, will be using the company’s MIL-STD-1553B IP Core, the BRM1553D, for their deep space mission logic designs.

NASA chose Sital’s product after a rigorous selection process during which it was thoroughly tested against several other competing products. It will be implemented inside a space environment hardened Field Programmable Gate Array (FPGA) which incorporates several electronic circuits to create a general purpose MIL-STD-1553B Remote Terminal.

Featuring the smallest gate count in the industry, Sital’s BRM1553D MIL-STD-1553B IP core offers highly improved reliability over other 1553 solutions. The product connects the back-end user logic with the front-end, a standard MIL-STD-1553B Muxbus which enables real-time management by connecting all the subsystems of avionics and satellite systems.

Sital’s product provides high levels of robustness, flexibility and ease-of-use and, in contrast with most cores and devices, does not require a CPU to manage the backend. It is also one of the few IP cores on the market that passed the RT Validation tests, a set of complex qualification tests required to connect to the front-end and ensure complete reliability.

“Sital’s product answered NASA’s requirements on several levels. They were looking for a product that would enable them to easily connect their data sources and data targets on the back-end, and would not require a CPU for managing the backend,” said Ofer Hofman, founder and R&D Manager of Sital Technology. “NASA’s decision to use an IP core, rather than a discrete device, is a significant milestone in the 20 year history of the MIL-STD-1553B standard. It signals an industry-wide trend towards using the more reliable and easily customizable IP cores for FPGAs instead of the expensive and inflexible single source 1553 IC chips.”

Sital’s IP cores are available for Remote Terminal and Bus Monitor applications. An IP core for Bus Controller applications will be available in Q1 2006. Sital’s business model enables the company to customize pricing models per the customer’s specific needs.

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