Sital Integrates Wiring Fault Detection Capabilities Into it’s BRM1553 MIL-STD-1553 IP Cores

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Sital Integrates Wiring Fault Detection Capabilities Into it’s BRM1553 MIL-STD-1553 IP Cores

Sital Technology Ltd. announced today that its patented technology for detecting wiring faults will be integrated into its BRM1553D, BRM1553FE and BRM1553PCI Mil-Std-1553 IP cores and boards.

Sital’s Passive TDR (pTDR™) technology is capable of detecting wiring problems such as disconnections, short-circuits, and others, whether they are constant or intermittent. pTDR is a Passive Time Domain Reflectometer (TDR) technology, which constantly measures reflections of energy on an operating Mil-Std-1553, CAN or similar bus. pTDR technology runs during normal system operation without disturbing the standard bus activity.

A standard TDR device sends pulses of energy to the bus and measures the reflected signal. Reflections are created from wiring faults such as disconnections, shorts or lack of proper termination. The time it takes for the signal to travel to the fault and back to the TDR is related to the location of the fault. However, a TDR cannot run while the system is operating, simply because it would be confused by the on-going transmissions on the bus, and also because it may disturb the standard communication.

pTDR does not transmit any pulses to the bus. Instead, it monitors the existing communications and measures reflections created by the normal transmissions. If there are wiring faults then signals will be distorted in certain ways that are related to the location of the fault. The main distortion is related to the width of transmitted bits. For example, in Mil-Std-1553 bits width is 1uS. A distorted bit can last for an additional few nano-seconds, according to the location of the fault. pTDR measures the distortions and reports the additional length of each bit. We call this additional length a “tail”.

The Sital pTDR system constantly reports tails from all Remote Terminals (RTs) on the network. In a correctly performing bus the tails from all RTs will be small and uniform. Changes in the tails indicate a bus fault.

Tail measurements are constantly performed on every message and updated on every frame. Therefore, even a very short disconnection event will be reported.

“The current situation is that each system on the aircraft performs its own built-in-test (BIT) and reports its own problems. But there is no mechanism for performing BIT to the bus wires or reporting wiring problems when they occur.” said Ofer Hofman, Sital’s CTO. “Our technology adds a great level of reliability to the bus, without interfering with the bus activity and without adding any complexity to the system.” He added.

Duli Yariv, Sital’s VP Marketing and Sales said: “Our pTDR™ technology is already implemented on CAN bus and used by automotive manufacturers for detecting wiring faults on vehicles during manufacturing, maintenance and operation. We are excited to enable our avionics and automotive customers to enjoy this technology, add value to their products and make safer aircraft and vehicles.”

pTDR technology for detecting wire faults will be available on the full range of Sital products: testers, IP cores and interface boards.

For more information please visit: https://sitaltech.com/technology/smart-wiring-fault-detection-technology/

Sital Announces the Availability of 10 Mbit MIL-STD-1553 IP Cores

Eight integrated circuits on a circuit board

Sital Technology announced today that it completed the design of the Enhanced Bit Rate (EBR) 1553 Intellectual Property core for FPGA.

The EBR-1553 protocol operates at a bit rate of 10Mbps, employing the resilient Mil-Std-1553 protocol through RS-485 transceivers in a point-to-point connection with a hub-based configuration. Robust and high-speed data transfer is facilitated by utilizing a star network topology between Bus Controllers (BC) and Remote Terminals.Sital’s EBR-1553 IP core is developed based on the established BRM1553D 1553 IP cores from Sital, featuring a DDC® Enhanced Mini-Ace® compatible interface. Available configurations include Remote Terminals, Bus Controllers, and Bus Monitor IP Cores. The BRM1553D core is compatible with any FPGA and only requires a standard RS-485 transceiver supporting a 10Mbps data transfer rate.

The use of the MIL-STD-1553 protocol and RS-485 transceivers offers top-notch error detection and correction capabilities. This ensures data integrity even in the most challenging environments.

Furthermore, the IP core’s compatibility with any FPGA and its flexibility in configuration allow for easy integration into existing systems, reducing development time and costs. The provision of software drivers and high-level API compatibility with DDC API facilitates a smooth transition for developers accustomed to traditional 1553 systems.

Users of Sital’s EBR-1553 IP core can select the core configuration (BC, RT, MT), clock frequency, memory configuration, and FPGA family. The back-end interface can be targeted to a local bus, PCI bus, or simple FIFO/registers read/write bus.

The IP Core is provided with software drivers for Windows, Linux, and QNX along with high-level API. The API is fully compatible with DDC API so that software developers already used to the DDC interface can easily transfer their existing applications to EBR.

An EBR-1553 tester is also available, utilizing the exact same hardware as the commonly used MultiComBox™, only with updated firmware.

The EBR-1553 IP core finds its application in various critical fields requiring high-speed and reliable data communication, such as aerospace, defense, and avionics systems. The ability to support a high bit rate of 10Mbps makes it ideal for modern, sophisticated applications, including mission-critical systems, where rapid data transfer and processing are paramount.

This enhanced bit rate significantly improves system performance and responsiveness in real-time operations. It also makes the IP core suitable for a wide range of communication protocols.

“We are very pleased that we can now deliver high-speed EBR-1553 IP to our customers”, said Duli Yariv, Sital’s VP of Sales and Marketing. “Customers will enjoy the robustness of the 1553 protocol at a high speed of 10Mbps over the very low-cost RS-485 transceivers, with the ability to easily integrate the core into their FPGA and application” he added.

Ofer Hofman, Sital’s CTO pointed out that “unlike other vendors’ solutions, Sital’s is a complete solution that includes all modes of operation – BC, RT and Monitor – along with software drivers and EBR tester hardware”.

The EBR-1553 IP core joins the Sital’s growing family of Mil-Std-1553, Arinc429, CAN, WB-194, and other reliable serial bus communication IP cores and solutions. For more information please contact us at: https://sitaltech.com/products-main-page/ebr-ip-core/

Sital Announces New IP for Aircarft and Vehicle Data Bus Diagnostics

Close-up of a blue circuit board

“Tail Code Key” is a method of enhancing MIL-STD-1553B and CAN bus maintenance quality by means of performing real time parametric testing on the bus. If functional testing results with “go” and “no-go”, which could be scaled as grade 100 and grade 0, “Tail Code Key” is a parametric test that will deliver a grade somewhere between 0 and 100.

There are three important benefits which are gained from the detailed grade:

The ability to detect failures before they impact functionality.
Physical location of failure on the bus.
Detection of single failure events during flight.

“Tail Code Key” is a set of numbers that are measured during flight in real time, 50 times a second. These numbers serve as a code – quality code. The code varies as a direct result of the quality of the bus.

If the bus connectors or wires degrade over time and usage, the measured code would change. Technicians get an early warning for problems that should be fixed before they fail the bus.

If single failure events occur during flight from physical stress or temperature changes, these single events impact the code, thus escape the tolerated margins. These events are recorded for repair. These single events downgrade the avionics communication quality exactly when they are critically needed. Typically such failures would not be traceable when the mission is complete.

Once the mission is done, bus problems are very hard to debug and require special equipment to pinpoint the exact physical location of the problem. In many cases the location is not found because the test is performed on wheels in 1G and in room temperature. Analyzing a recorded key code unveils the location of the problem.

The Tail Code Key technology is seamlessly integrated with Sital’s BRM1553D, ARINC825 and CAN bus IPs and enables advanced maintenance application development for avionic and automotive applications

If you would like to receive more information, then please contact us.

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