BRM1553ERL

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Space Grade, High Reliability MIL-STD-1553 IP Core

chip ERL 1553

Designed from ground up for use in space applications, Sital’s BRM1553ERL IP core offers a uniquely compact, robust and reliable BC, RT, MT solution for any FPGA and ASIC. The core implements special features for rapidly mitigating against single event upsets that commonly occur in space applications.

The core implements features including Hamming-Code, watchdog timers and logic to reset all state-machines following every MIL-STD-1553 message.

Selected by NASA for use in satellites and other spacecraft, the BRM1553ERL ensures a successful and robust implementation of MIL-STD-1553 for any space or other high-reliability application.

This core is available in multiple configurations. The BRM553ERL option includes memory, and is register and memory structure compatible with DDC’s® Enhanced Mini-ACE®, Micro-ACE® and Total-ACE®. Alternatively, the core is also available with “simple-system” back-end configuration (BRD1553ERL-FE). This version includes no memory and can operate without a processor or software.

There’s also the BRD1553ERL-SnS version, which incorporates Sital’s Safe and Secure (SnS) functionality. Sital’s SnS can detect instances of “snooping” (impersonation) and also detecting and locating open and short circuit electrical faults in cables, connectors couplers, terminators or LRUs.

  • MIL-STD-1553 Intellectual Property for FPGAs
  • Suitable for any High-Reliability MIL-STD-1553 BC, RT, MT implementation
  • Includes features to mitigate against single event upsets: Hamming code, watchdog timers and logic to reset all internal state-machines following every MIL-STD-1553 message.
  • Very small FPGA area utilization
  • Supports any even MHz multiple clock frequency
  • Two possible back-end interfaces available:
    • Front-End – for simple implementations, no memory, does not require a processor or software
    • DDC® compatible – for more complex applications
  • Provided with full verification environment
  • Passed full validation testing by 3rd party
  • Based on vendor and technology independent VHDL code

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ensure a successful and robust implementation of MIL-STD-1553 for any space or other high-reliability application

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safe illustration

Safe and Secure

Sital’s cutting-edge, innovative “SnS” Technology is designed for IP Core’s physical layer. We supply our products with DO-254 and DO-178 certifiability, including DAL A. Our partners: Logicircuit and ConsuNova provide the DO-254 and DO-178 artifacts. Through enhanced physical layer monitoring, the patented “SnS” analyzes all DataBus messages and provides 2 unique capabilities:

 

 

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