As part of a customer’s system, Sitals BRM1553 MIL-STD-1553 FPGA IP core recently passed all the RT validation tests at Test Systems Inc.
During the test, an issue was raised regarding the noise immunity of the system under test.
Noise Rejection Tests are performed during the RT Validation test in section 5.3. It is the last test in 1553 RT Validation, and is done by sending multiple 1553 messages to the RT, polluted by noise of predefined characteristics.
In this case, the system under test used a very marginal 1553 transceiver which suffered from bad symmetry and created a considerable DC offset. This system failed the noise test (although by just a bit – 130mV instead of 140mV).
Needless to say that Sitals IP core passed the same tests many times in the past, with various transceivers and configurations.
The customer had 2 other similar boards which passed the tests at his own lab (with similar equipment as in Test Systems Inc.), but he decided to use the worst-case board for the RT validation testing.
Nevertheless, Sital took upon itself to improve the noise immunity of its IP regardless of the quality of the transceiver. The alternative for this customer was to re-spin his board and switch to another transceiver component.
After some modifications to the IP core, the same system passed the noise test with very good results.
“This is a clear example of the advantage of using an IP core.” Said Duli Yariv, Sital’s VP for Sales and Marketing. “Within a few days we provided an effective solution, avoiding the customer from going through the long and costly process of making changes to his board” he added.
We therefore recommend our customers to update their IP core to the newest version.
This update is free for customers under support.