Safe and Secure MIL-STD-1553 IP Core

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Secured 1553 FPGA IP Core

The world’s first secured MIL-STD-1553B FPGA IP Core.

Based on the popular BRM1553D , the Safe and Secure MIL-STD-1553 IP Core enables real-time detection and prevention of various cyber attacks on the MIL-STD-1553B bus and it’s LRUs and sub-systems.

The Secured 1553 FPGA IP is designed for integration into any FPGA based design and enables immediate protection to the entire bus from a single point regardless of the bus topology  – star or multi drop.

  • Compact VHDL IP code for integration in inside avionic products.
  • Supporting MIL-STD-1553B protocol as Bus Controller, Remote Terminal or Monitor
  • Works with any COTS transceiver and transformer and with extended features when used with the DES1553XVR transceiver
  • Monitors and protects the entire bus from a single point regardless of the bus topology – star or multi-drop
  • Passive technology without any transmission on the bus.
  • Programmable security profiles for various communication types and roles
  • SPI based development kit for multi role secured 1553 development
  • Device drivers for : VxWorks 7.0, Linux, Embedded Linux, Integrity, QNX , PikeOS

Select products for quote:

Secured 1553 SPI development Kit with PMOD
Secured 1553 FPGA IP Core
Secured 1553 for Space
Secured 1553 SPI development Kit

for Free Evaluation and hardware Samples

safe illustration

Safe and Secure

Sital’s cutting-edge, innovative “SnS” Technology is designed for IP Core’s physical layer. We supply our products with DO-254 and DO-178 certifiability, including DAL A. Our partners: Logicircuit and ConsuNova provide the DO-254 and DO-178 artifacts. Through enhanced physical layer monitoring, the patented “SnS” analyzes all DataBus messages and provides 2 unique capabilities:

 

 

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