SPI-to-MIL-STD-1553 IP Core

FPGA cyber security

Sital Technology’s BRM1553-SPI IP core, transceiver and transformer provide an ideal solution for interfacing between a processor with a SPI port and a dual redundant MIL-STD-1553 bus.

Designed from the ground up for use in aerospace, avionics and military MIL-STD-1553 solutions, the BRM1553-SPI, like all of Sital’s MIL-STD-1553 IP cores, offers a uniquely compact, robust and reliable BC, RT, MT solution for any PLD/FPGA or ASIC device. All of Sital’s 1553 IP cores were developed based on the company’s unflagging commitment to quality and excellence with strict adherence to meeting the stringent requirements of military and aerospace specifications.

The BRM1553-SPI IP core is based on Sital’s popular flagship BRM1553D MIL-STD-1553 core and provides the same register and memory hardware/software interface. For support of the BRM1553-SPI core, Sital offers API/library/driver software. Sital’s MIL-STD-1553 software consists of over 150 low-level and high-level function calls for use in BC, RT, Monitor or RT/Monitor modes. Sital can provide its API/library with OS drivers for VxWorks 6.9, 7.0 or 653; Linux 3.0, LynxOS, Pico/Linux or Petalinux; Windows; PikeOS, Green hills Integrity or bare metal (no OS). The software is provided with API/library documentation and sample programs.

For programs requiring DO-254 and DO-178 certifiability, Sital is able to provide its BRM1553-SPI IP core and software drivers with certifiability at design assurance levels up to and including DAL A. Another option Sital offers is its Safe and Secure (SnS) technology. By means of enhanced physical layer monitoring, Sital’s SnS is able to detect cyber authentication violations (i.e., impersonation or “spoofing”) and detect and locate intermittent or continuous open and short circuit wire faults.

Sital Technology and Hardware Engineering, Ltd. is a Xilinx Partner (xilinx.com)

  • MIL-STD-1553 Intellectual Property for FPGAs and ASICs
  • Provides 1553 BC, RT, MT and RT/MT operating modes
  • Architecturally compatible with DDC® Enhanced Mini-Ace® and Micro-Ace® and works with Sital API/library/driver software
  • 4-wire SPI serial target interface.
  • Operates at SPI data rates up to 50 Mb/s
  • Supports any even clock frequency ≥ 12 MHz
  • Works with shared RAM between 4K x 16 and 64k x 16
  • Small FPGA resource utilization
  • Supplied with dual MIL-STD-1553 transceivers and isolation transformers
  • Modular architecture allowing flexible implementations to minimize FPGA footprint
  • Provided as vendor and technology independent VHDL netlist code
  • SPI Master IP core available for host interface

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  • Description: Single Program Development License for SPI-to-MIL-STD-1553 IP core, including 10 prototype units

  • Description: Single-instantiation IP core hardware key chip for SPI-to-MIL-STD-1553 IP core

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