Sital Extends it’s BRM1553 IP with Error Injection Testing Capabilities

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Sital Extends it’s BRM1553 IP with Error Injection Testing Capabilities

Until now, BRM1553 IP cores delivered to customers were mainly targeted for in-flight applications. This means that no errors are allowed to be generated from the system.

However, a recent customer application required Mil-Std-1553 testing capabilities from an already-existing flight system, so that the same system can be used as a bus simulator on the ground or as an in-flight operational system.

Multi-RT feature is an essential feature for a Mil-Std-1553 bus simulator. It means that a single 1553 node can be programmed to act as many 1553 Remote Terminals. The user can program the Remote Terminal (RT) addresses which are simulated and thus the unit will answer and create messages, as requested by a Bus Controller (BC) for the simulated RTs.

The Error Injection feature enables the system to simulate several types of errors which may occur on a 1553 network. Therefore, errors like Parity Error, Sync. Error, Zero-Crossing Error and others are all part of an advanced 1553 test and simulation system.

Same Hardware for Interface Card and Test Benches.

Many avionics vendors, who develop avionic systems, are required to provide test benches for their systems. In many cases, developing the test bench is a high cost project, requiring development of boards, software and other simulation tools, usually at low volumes. Therefore the advantages of developing a single hardware that can be used both as a flight system and as a bus simulation tool are obvious. First – there is only need to develop a single hardware, and not require equipment from additional vendors for bus simulation and testing. Second – customers can re-use the software written originally for the actual system also for testing, ensuring lower development cost and enabling faster time to market.

Of-course, the customer needs to make sure that the test software is not loaded into the operational systems. This can be achieved by having a separate FPGA load file for each system and also by enabling or disabling the Multi-RT and Error Injection features by hardware. This means that the IP core can enable or disable the features, by reading hardware configuration bits, which are set differently between the tester and the in-flight system.

Both features can be added to Sital’s standard BRM1553D, BRM1553PCI and BRM1553FE Mil-Std-1553 IP core and are provided with software API, so that users can easily implement these test features into an existing Mil-Std-1553 system.

Sital Announces the Availability of 10 Mbit MIL-STD-1553 IP Cores

Sital Technology announced today that it completed the design of the Enhanced Bit Rate (EBR) 1553 Intellectual Property core for FPGA.

EBR-1553 is a 10Mbps bit rate protocol that utilized the robust Mil-Std-1553 protocol over RS-485 transceivers in a hub-based point-to-point connection. Using a star network topology between BC & Remote Terminals enables robust and high-speed data transfer.

Sital’s EBR-1553 IP core’s based on Sital’s proven BRM1553D 1553 IP cores, with DDC® Enhanced Mini-Ace® compatible interface. The ones available are Remote Terminals, Bus Controller as well as Bus Monitor IP Core configurations. The BRM1553D core can work with any FPGA, and requires only a standard RS-485 transceiver, which supports 10Mbps.

Users of Sital’s EBR-1553 IP core can select the core configuration (BC, RT, MT), clock frequency, memory configuration and FPGA family. The back-end interface can be targeted to a local-bus, PCI bus or simple FIFO/registers read/write bus.

The IP Core is provided with software drivers for Windows, Linux, and QNX along with high-level API. The API is fully compatible with DDC API, so that software developers already used to the DDC interface can easily transfer their existing applications to EBR.

An EBR-1553 tester is also available, utilizing the exact same hardware as the commonly used MultiComBox™, only with updated firmware.

“We are very pleased that we can now deliver high-speed EBR-1553 IP to our customers” said Duli Yariv, Sital’s VP Sales and Marketing. “Customers will enjoy the robustness of the 1553 protocol at a high speed of 10Mbps over the very low-cost RS-485 transceivers, with the ability to easily integrate the core into their FPGA and application” he added.

Ofer Hofman, Sital’s CTO pointed that “unlike other vendors’ solutions, Sital’s is a complete solution that includes all modes of operation – BC, RT and Monitor – along with software drivers and EBR tester hardware”.

The EBR-1553 IP core joins the Sital’s growing family of Mil-Std-1553, Arinc429, CAN, WB-194 and other reliable serial bus communication IP cores and solutions.

For more information please contact us at: https://sitaltech.com/products-main-page/ebr-ip-core/

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